1. Field of the Invention
The present invention relates to a semiconductor device having an input protection circuit for preventing an internal circuit element or a circuit element forming a peripheral circuit from being broken by static electricity charged onto an outer terminal of the semiconductor device.
2. Description of the Related Art
In a semiconductor device, there are usually provided input protection circuits in order to prevent breakage of an element of the inside of a chip. This problem may occur when a high voltage accidentally generated or static electricity charged on a human body is applied to an outer terminal. Or, the input protection circuits are provided in order to prevent a circuit element, which forms a peripheral circuit such as a MOS transistor or a memory cell, from being damaged or broken by introducing a carrier into a semiconductor substrate through a plurality of pads or bonding pads.
A semiconductor device has a plurality of pads, or bonding pads, to receive input signals from external devices, and to send output signals to external devices. Those pads are connected to loads with bonding wires. Each of the input protection circuits is provided for each of the bonding pads.
FIG. 1 shows a conventional input protection circuit. An N conductivity type impurity diffusion region 201 is formed in a P conductivity type silicon substrate 200. An input pad 202 is connected to the N type region 201. Internal circuits including an N channel MOS transistor 203 are formed in the substrate. An interface between the P type substrate 200 and the N type region 201 forms a PN junction.
The following is a description of how the input protection circuit works. In a normal operation mode of the device, such as DRAM, the highest voltage which is applied to the pad 202 is the same as the one of logic high level "H", for example 3.3V. The PN junction is biased reversely, and no current flows therethrough. However, a sudden application of a high voltage, for example 10V, to the input pad 202 causes the PN junction to break down. Then, a current flows from the input pad 202 through the PN junction to the P type substrate 200, which prevents the high voltage from reaching the internal circuits. Therefore, the internal circuits are protected from a sudden application of a high voltage.
However, the conventional input protection circuit shown in FIG. 1 has a following problem.
In recent years, in accordance with improvement of a processing technique, miniaturization of a size of the element, or fining the element, there is a tendency for a withstand voltage against static electricity to be worsened. Particularly, in a semiconductor storage device such as a DRAM or an EEPROM, which is considerably made fine, improvement of such a withstand voltage against static electricity is an important subject.